AMDGPU/SI: Fix visit order assumption in SIFixSGPRCopies
authorTom Stellard <thomas.stellard@amd.com>
Fri, 11 Nov 2016 23:35:42 +0000 (23:35 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Fri, 11 Nov 2016 23:35:42 +0000 (23:35 +0000)
commit9fdbec870c0f3a0c7aa8185f577bf01e4abc5b14
treeca7cb7c351d35ff890cd9c784b98ad5fd70be830
parentd420224daca522e6a5796861ed9724ad9095a4ba
AMDGPU/SI: Fix visit order assumption in SIFixSGPRCopies

Summary:
This pass was assuming that when a PHI instruction defined a register
used by another PHI instruction that the defining insstruction would
be legalized before the using instruction.

This assumption was causing the pass to not legalize some PHI nodes
within divergent flow-control.

This fixes a bug that was uncovered by r285762.

Reviewers: nhaehnle, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D26303

llvm-svn: 286676
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
llvm/test/CodeGen/MIR/AMDGPU/si-fix-sgpr-copies.mir [new file with mode: 0644]