clk: hi6220: change watchdog clock source
authorLeo Yan <leo.yan@linaro.org>
Tue, 29 Aug 2017 07:58:37 +0000 (15:58 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 1 Sep 2017 01:32:43 +0000 (18:32 -0700)
commit9fa7231b1979f792b2cbc395c52e197158494948
treefcff37bf6f5872a9f5cfb632ae677a1359c134c0
parent65bc9d7ff2d7c93a09dd6d6632d6170058fc0d34
clk: hi6220: change watchdog clock source

The old code uses tcxo (19.2MHz) as watchdog clock but actually the
watchdog uses 32K clock, as result the watchdog timeout cannot be set
correctly and delay long time to reset SoC.

So this patch is to use 'ref32k' as clock source for watchdog.

Fixes: 72ea48610d43 ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC")
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/hisilicon/clk-hi6220.c