ARM: dts: stm32mp15: update DDR node
authorPatrick Delaunay <patrick.delaunay@foss.st.com>
Wed, 21 Sep 2022 07:37:13 +0000 (09:37 +0200)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Fri, 23 Sep 2022 12:35:45 +0000 (14:35 +0200)
commit9f7c58dc0deacd6c453ac628953741f1a6a68126
tree893e659f70e6061811312a32a27536010fa65d1d
parent86d5a06ae3b826bf7b4627e926afd5378d88c574
ARM: dts: stm32mp15: update DDR node

Remove the unnecessary nodes for TFABOOT and keep the mandatory part
in SOC dtsi, only the DDRCTRL and DDRPHY addresses.
This patch allows to manage the DDR configuration setting in U-Boot
device tree only if it is needed, when CONFIG_SPL is defined.

With TFABOOT, the DDR configuration is done in TF-A BL2 and the DDR size
is dynamically computed in U-Boot since commit d72e7bbe7c28 ("ram:
stm32mp1: compute DDR size from DDRCTL registers").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
arch/arm/dts/stm32mp15-ddr.dtsi
arch/arm/dts/stm32mp15-u-boot.dtsi
arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi