crypto: caam - fix writing to JQCR_MS when using service interface
authorHoria Geant? <horia.geanta@freescale.com>
Fri, 21 Aug 2015 15:53:20 +0000 (18:53 +0300)
committerHerbert Xu <herbert@gondor.apana.org.au>
Mon, 24 Aug 2015 14:07:38 +0000 (22:07 +0800)
commit9f587fa29f7e8ed6b8885cff51a51ace3ad85152
treeaa4db25708fc827a2159d9f7c4e8e8dd2ed691c3
parentd4421c54c45f643731c92daa8e268ce74dcdf5a2
crypto: caam - fix writing to JQCR_MS when using service interface

Most significant part of JQCR (Job Queue Control Register) contains
bits that control endianness: ILE - Immediate Little Endian,
DWS - Double Word Swap.
The bits are automatically set by the Job Queue Controller HW.

Unfortunately these bits are cleared in SW when submitting descriptors
via the register-based service interface.
>From LS1021A:
JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0)
JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0)

This would cause problems on little endian caam for descriptors
containing immediata data or double-word pointers.
Currently there is no problem since the only descriptors ran through
this interface are the ones that (un)instantiate RNG.

Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/caam/ctrl.c