[X86] Add patterns for folding full vector load into MOVHPS and MOVLPS with SSE1...
authorCraig Topper <craig.topper@intel.com>
Tue, 17 Jul 2018 20:16:18 +0000 (20:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Tue, 17 Jul 2018 20:16:18 +0000 (20:16 +0000)
commit9ef92865ecca5bbe3bf9ef10a3bb569c16af8bdd
tree1214882d5c749311a9f13d22498b621e004f6134
parentc0f2e306f2388a0ad1f10e4e9cc8157121d4f4e5
[X86] Add patterns for folding full vector load into MOVHPS and MOVLPS with SSE1 only.

llvm-svn: 337320
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/vector-shuffle-sse1.ll