arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0
authorMarc Zyngier <maz@kernel.org>
Sun, 17 Oct 2021 12:42:23 +0000 (13:42 +0100)
committerWill Deacon <will@kernel.org>
Tue, 19 Oct 2021 09:56:20 +0000 (10:56 +0100)
commit9ee840a96042cef9f7d36337ce05144d6c013858
tree26cd3150704d6868e2bd19a493eacbfc2d0f0e11
parentfdf865988b5a404f91f86a1b3b665440a9ebafb2
arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0

CNTPCTSS_EL0 and CNTVCTSS_EL0 are alternatives to the usual
CNTPCT_EL0 and CNTVCT_EL0 that do not require a previous ISB
to be synchronised (SS stands for Self-Synchronising).

Use the ARM64_HAS_ECV capability to control alternative sequences
that switch to these low(er)-cost primitives. Note that the
counter access in the VDSO is for now left alone until we decide
whether we want to allow this.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211017124225.3018098-16-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/arch_timer.h
arch/arm64/include/asm/sysreg.h