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can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS
authorMarc Kleine-Budde <mkl@pengutronix.de>
Tue, 1 Sep 2015 06:57:55 +0000 (08:57 +0200)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Mon, 6 Feb 2017 14:13:42 +0000 (15:13 +0100)
commit9eb7aa891101a4a09114ff3191f9877ea35eae06
tree33826e4957f696a23f55d007d71a44490082b5bdtree | snapshot
parent4bd888a80b1d48dbd83f1cbf806e923a30051958commit | diff
can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS

In order to receive RTR frames in the non HW FIFO mode the RSS and EACEN bits
of the reg_ctrl2 have to be activated. As this has no side effect in the FIFO
mode, we do this unconditionally on cores with the reg_ctrl2.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
drivers/net/can/flexcan.c diff | blob | history
Domain: System / Kernel;