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(parent: cfc0c18) | patch
drm/msm/dsi_pll_7nm: restore VCO rate during restore_state
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 15 Oct 2020 19:03:29 +0000 (22:03 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:53:01 +0000 (11:53 +0100)
commit9e737d120b524b7bb3937af282eb452276830902
treef73f3a8acc95dc3f410f2df8f08c000d2f108127tree | snapshot
parentcfc0c1840354187f71f0334ac66ac1bec6bdcbebcommit | diff
drm/msm/dsi_pll_7nm: restore VCO rate during restore_state

[ Upstream commit 5047ab95bb7db0e7b2ecfd5e9bcafc7fd822c652 ]

PHY disable/enable resets PLL registers to default values. Thus in
addition to restoring several registers we also need to restore VCO rate
settings.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 1ef7c99d145c ("drm/msm/dsi: add support for 7nm DSI PHY/PLL")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c diff | blob | history
Domain: System / Kernel;