MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADE
authorShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Thu, 17 Jun 2010 11:36:13 +0000 (20:36 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 5 Aug 2010 12:26:04 +0000 (13:26 +0100)
commit9e6f39698ac66e08017114a51600bf633becd011
tree8541bf18a98af7cd8a7d5634b9d202a88d0df9b0
parenteebacda40f2f9818c92f61b2228c7888e1f4926c
MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADE

Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only.  We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/emma/markeins/irq.c
arch/mips/include/asm/emma/emma2rh.h