[RISCV] Add RV32 test cases for vloxseg.
authorHsiangkai Wang <kai.wang@sifive.com>
Thu, 21 Jan 2021 15:39:13 +0000 (23:39 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Sat, 23 Jan 2021 00:54:56 +0000 (08:54 +0800)
commit9e5beadf1805a5906c2ea0d04eb615ce5f92508b
tree85c851ffc59a7cf06895326b383cc81313d55a6b
parentb23fe6ff6ff736a5d319598bc818defc09968200
[RISCV] Add RV32 test cases for vloxseg.

Differential Revision: https://reviews.llvm.org/D95191
llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll [new file with mode: 0644]