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(parent: 085d7a4) | patch
clk: qcom: Add support for phase locked loops (PLLs)
authorStephen Boyd <sboyd@codeaurora.org>
Wed, 15 Jan 2014 18:47:24 +0000 (10:47 -0800)
committerMike Turquette <mturquette@linaro.org>
Thu, 16 Jan 2014 20:00:59 +0000 (12:00 -0800)
commit9e2631313c463c11645db046beb9bdecaf28b62f
treee5af54c695abf7a218b7af55c5fcc40bcf9076e3tree | snapshot
parent085d7a455444f4d425371ee3c8a273c6e1b522dbcommit | diff
clk: qcom: Add support for phase locked loops (PLLs)

Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/qcom/Makefile diff | blob | history
drivers/clk/qcom/clk-pll.c [new file with mode: 0644] blob
drivers/clk/qcom/clk-pll.h [new file with mode: 0644] blob
Domain: System / Kernel;