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(parent: 888d3d4) | patch
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
authorMarek Vasut <marex@denx.de>
Tue, 14 Sep 2021 03:25:36 +0000 (05:25 +0200)
committerRamon Fried <rfried.dev@gmail.com>
Tue, 28 Sep 2021 15:50:55 +0000 (18:50 +0300)
commit9de0f144c70899f498ba2b90ae2758dcf79ce481
tree8463601429ff52810ffce7ade50423d27463cc3btree | snapshot
parent888d3d44af5350d2e39035c7dd1a77842228e02ccommit | diff
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO

The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
board/softing/vining_fpga/socfpga.c diff | blob | history
Domain: System / Kernel;