[X86] Optimization of inserting vxi1 sub vector into vXi1 vector
authorWang, Pengfei <pengfei.wang@intel.com>
Fri, 3 Jan 2020 01:04:44 +0000 (09:04 +0800)
committerWang, Pengfei <pengfei.wang@intel.com>
Fri, 3 Jan 2020 01:25:25 +0000 (09:25 +0800)
commit9dc9e0ea64f507488b5ca9cd656311db94433201
treedbf9922cfda85d78125a3b36701af494302f1457
parent4117c8c0194cdf59e229f6826e0908eb3f2bcfc6
[X86] Optimization of inserting vxi1 sub vector into vXi1 vector

Summary:
After bugfix the undef value case here, we used more operations to implement inserting vxi1 sub vector into vXi1 vector, I optimize it by use less operations.

The history information at https://reviews.llvm.org/D68311

Reviewers: craig.topper, LuoYuanke, yubing, annita.zhang, pengfei, LiuChen3, RKSimon

Reviewed By: craig.topper

Subscribers: hiraditya, llvm-commits

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D71917
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avx512-calling-conv.ll
llvm/test/CodeGen/X86/avx512-ext.ll
llvm/test/CodeGen/X86/avx512-insert-extract.ll
llvm/test/CodeGen/X86/avx512-mask-op.ll
llvm/test/CodeGen/X86/masked_store.ll
llvm/test/CodeGen/X86/min-legal-vector-width.ll
llvm/test/CodeGen/X86/vec_smulo.ll
llvm/test/CodeGen/X86/vec_umulo.ll