ARM: MX51: PLL errata workaround
authorDavid Jander <david@protonic.nl>
Wed, 13 Jul 2011 21:11:53 +0000 (21:11 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 4 Sep 2011 09:36:11 +0000 (11:36 +0200)
commit9db1bfa110ac411ab3468e817f7f74b2439eb8c8
treec9fd5e7dc463937e8642e410c644ebdf067dfbe3
parent96c9745fa1f03a0e24d09a32344a1f0c821bc9af
ARM: MX51: PLL errata workaround

This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
arch/arm/cpu/armv7/mx5/lowlevel_init.S
arch/arm/include/asm/arch-mx5/imx-regs.h
doc/README.imx5 [new file with mode: 0644]