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(parent: ad75620) | patch
nvc0/ir: cache vertex out base so that we don't recompute again
authorIlia Mirkin <imirkin@alum.mit.edu>
Wed, 29 Jul 2015 15:01:08 +0000 (11:01 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Wed, 29 Jul 2015 15:05:56 +0000 (11:05 -0400)
commit9da9adcfd7df45a0a337e0fbf482f60ff5566499
treeb66e2fe3ed16bf7037bcb633bfdde7d7cc0950d1tree | snapshot
parentad75620863392b2164a415186087beb831ccfa4ccommit | diff
nvc0/ir: cache vertex out base so that we don't recompute again

The global CSE pass stinks and is unable to pull this out. Easy enough
to handle it here and avoid generating unnecessary special register
loads (which can allegedly be quite slow).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp diff | blob | history
Domain: Graphics System / GL;