perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
authorYicong Yang <yangyicong@hisilicon.com>
Mon, 14 Aug 2023 12:40:12 +0000 (20:40 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 23 Sep 2023 09:11:00 +0000 (11:11 +0200)
commit9d9b5cbc12f49fbdbbc454383981039005af8211
tree4f47168ff16baadacb1cc9e7b1818421ca45f2f7
parent4cb0612cf260385273f7588bf864356e2a417983
perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09

[ Upstream commit 0242737dc4eb9f6e9a5ea594b3f93efa0b12f28d ]

Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU
disable control sometimes fail to disable the counters. This will lead
to error or inaccurate data since before we enable the counters the
counter's still counting for the event used in last perf session.

This patch tries to fix this by hardening the global disable process.
Before disable the PMU, writing an invalid event type (0xffff) to
focibly stop the counters. Correspondingly restore each events on
pmu::pmu_enable().

Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20230814124012.58013-1-yangyicong@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Documentation/arm64/silicon-errata.rst
drivers/acpi/arm64/iort.c
drivers/perf/arm_smmuv3_pmu.c
include/linux/acpi_iort.h