i2c: fix bus recovery stop mode timing
authorRussell King <rmk+kernel@armlinux.org.uk>
Sun, 15 Dec 2019 16:39:05 +0000 (16:39 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 14 Jan 2020 19:08:18 +0000 (20:08 +0100)
commit9d7e2f25a0fde3e216a97e90b6556adf0d7d3eca
tree9d2cf9ad93b9ca2de26e296d5a460178cd762da2
parent341464390512ed50d5e96cf8f5340dcfbebd837a
i2c: fix bus recovery stop mode timing

commit cf8ce8b80f8bf9669f6ec4e71e16668430febdac upstream.

The I2C specification states that tsu:sto for standard mode timing must
be at minimum 4us. Pictographically, this is:

SCL: ____/~~~~~~~~~
SDA: _________/~~~~
       ->|    |<- 4us minimum

We are currently waiting 2.5us between asserting SCL and SDA, which is
in violation of the standard. Adjust the timings to ensure that we meet
what is stipulated as the minimum timings to ensure that all devices
correctly interpret the STOP bus transition.

This is more important than trying to generate a square wave with even
duty cycle.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/i2c/i2c-core-base.c