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[PowerPC] Make specialized AltiVec patterns isCodeGenOnly
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Jul 2013 12:51:09 +0000 (12:51 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Jul 2013 12:51:09 +0000 (12:51 +0000)
commit9d2e202d658b6a82be1c4ea1cd301948d3b73f95
treec7078a3a1708a3590c81479757db6c2179b3775etree | snapshot
parentae9cf5828c83004b7180daf1ca29e3a11d1d7188commit | diff
[PowerPC] Make specialized AltiVec patterns isCodeGenOnly

A couple of AltiVec patterns are just specialized forms of the
generic instruction pattern, and should therefore be marked
isCodeGenOnly to avoid confusing the asm parser:
VCFSX_0, VCTUXS_0, VCFUX_0, VCTSXS_0, and V_SETALLONES.

Noticed by inspection of the generated PPCGenAsmMatcher.inc.

llvm-svn: 185533
llvm/lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
Domain: System / Toolchain;