Implement parametric tiling on standard for loops
authorAlex Zinenko <zinenko@google.com>
Tue, 9 Jul 2019 13:37:17 +0000 (06:37 -0700)
committerA. Unique TensorFlower <gardener@tensorflow.org>
Tue, 9 Jul 2019 13:37:41 +0000 (06:37 -0700)
commit9d03f5674f4e511d834b3de9d24eb1248a06f864
tree7d363d8ec7512beb32da683197901958cdf24cce
parent80e287108771685d1eb20ad3f27f4459068604f0
Implement parametric tiling on standard for loops

Parametric tiling can be used to extract outer loops with fixed number of
iterations.  This in turn enables mapping to GPU kernels on a fixed grid
independently of the range of the original loops, which may be unknown
statically, making the kernel adaptable to different sizes.  Provide a utility
function that also computes the parametric tile size given the range of the
loop.  Exercise the utility function through a simple pass that applies it to
all top-level loop nests.  Permutability or parallelism checks must be
performed before calling this utility function in actual passes.

Note that parametric tiling cannot be implemented in a purely affine way,
although it can be encoded using semi-affine maps.  The choice to implement it
on standard loops is guided by them being the common representation between
Affine loops, Linalg and GPU kernels.

PiperOrigin-RevId: 257180251
mlir/include/mlir/IR/OpDefinition.h
mlir/include/mlir/Pass/PassRegistry.h
mlir/include/mlir/StandardOps/Ops.td
mlir/include/mlir/Transforms/LoopUtils.h
mlir/include/mlir/Transforms/Passes.h
mlir/lib/Transforms/LoopParametricTiling.cpp [new file with mode: 0644]
mlir/lib/Transforms/Utils/LoopUtils.cpp
mlir/test/Transforms/parametric_tiling.mlir [new file with mode: 0644]