Relax condition of (vec_concat:M(vec_select op0 idx0)(vec_select op0 idx1)) to allow...
authorliuhongt <hongtao.liu@intel.com>
Fri, 10 Sep 2021 02:15:58 +0000 (10:15 +0800)
committerliuhongt <hongtao.liu@intel.com>
Tue, 28 Sep 2021 03:00:29 +0000 (11:00 +0800)
commit9cfb95f9b92326e86e99b50350ebf04fa9cd2477
treefabd1771c0d17d5f629c29d5d9a941a98979fa45
parent3540429be7ad1085af83600483908b621078fb6f
Relax condition of (vec_concat:M(vec_select op0 idx0)(vec_select op0 idx1)) to allow different modes between op0 and M, but have same inner mode.

This will enable optimization for below pattern.

(set (reg:V2DF 87 [ xx ])
    (vec_concat:V2DF (vec_select:DF (reg:V4DF 92)
            (parallel [
                    (const_int 2 [0x2])
                ]))
        (vec_select:DF (reg:V4DF 92)
            (parallel [
                    (const_int 3 [0x3])
                ]))))

gcc/ChangeLog:

* simplify-rtx.c
(simplify_context::simplify_binary_operation_1): Relax
condition of simplifying (vec_concat:M (vec_select op0
index0)(vec_select op1 index1)) to allow different modes
between op0 and M, but have same inner mode.

gcc/testsuite/ChangeLog:

* gcc.target/i386/vect-rebuild.c: Adjust testcases.
* gcc.target/i386/avx512f-vect-rebuild.c: New test.
gcc/simplify-rtx.c
gcc/testsuite/gcc.target/i386/avx512f-vect-rebuild.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/vect-rebuild.c