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(parent: b62c158) | patch
pre-RA-sched: fix TargetOpcode usage
authorChristian Konig <christian.koenig@amd.com>
Wed, 20 Mar 2013 13:49:22 +0000 (13:49 +0000)
committerChristian Konig <christian.koenig@amd.com>
Wed, 20 Mar 2013 13:49:22 +0000 (13:49 +0000)
commit9ce2d5b862575665f6de0ac0ed8eb114d581338f
treed6abd22c2cfc193d3e8ad64124f60600a0e177d1tree | snapshot
parentb62c158d811be14ad6ae5f7ebe48e6035aa94da5commit | diff
pre-RA-sched: fix TargetOpcode usage

TargetOpcodes need to be treaded as Machine- and not ISD-Opcodes.

Signed-off-by: Christian König <christian.koenig@amd.com>
llvm-svn: 177518
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp diff | blob | history
Domain: System / Toolchain;