clk: samsung: exynos3250: Add UART2 clock
authorChanwoo Choi <cw00.choi@samsung.com>
Fri, 17 Jul 2015 05:51:01 +0000 (14:51 +0900)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:50:25 +0000 (13:50 +0900)
commit9cb787642ad40746437637245fc0a5122b5f904a
tree8363150aeec428992b64553eabb359375939592f
parentd5c117ccdde0b9a25161ea033364dbed479a1d55
clk: samsung: exynos3250: Add UART2 clock

This patch add the UART2 clocks (mux, divider, gate) of Exynos3250 SoC.

Change-Id: I5b013ed835a3985659f956b2bd3e64dbeeca7369
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
drivers/clk/samsung/clk-exynos3250.c
include/dt-bindings/clock/exynos3250.h