[SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 6 Oct 2018 10:20:04 +0000 (10:20 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 6 Oct 2018 10:20:04 +0000 (10:20 +0000)
commit9c9c97bcf433db56d5451641a05f297f1122e7f0
treec29a81573f6c2f9a5b62be7d41737cfdae2f247b
parent39f7b3967a545ba8380384fc6cf2b01ced834074
[SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification

This patch enables SimplifyDemandedBits to call SimplifyDemandedVectorElts in cases where the demanded bits mask covers entire elements of a bitcasted source vector.

There are a couple of cases here where simplification at a deeper level (such as through bitcasts) prevents further simplification - CommitTargetLoweringOpt only adds immediate uses/users back to the worklist when we might want to combine the original caller again to see what else it can simplify.

As well as that I had to disable handling of bool vector until SimplifyDemandedVectorElts better supports some of their opcodes (SETCC, shifts etc.).

Fixes PR39178

Differential Revision: https://reviews.llvm.org/D52935

llvm-svn: 343913
18 files changed:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/combine-pmuldq.ll
llvm/test/CodeGen/X86/combine-shl.ll
llvm/test/CodeGen/X86/mulvi32.ll
llvm/test/CodeGen/X86/pmul.ll
llvm/test/CodeGen/X86/pr35918.ll
llvm/test/CodeGen/X86/shrink_vmul.ll
llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
llvm/test/CodeGen/X86/vector-mul.ll
llvm/test/CodeGen/X86/vector-reduce-mul.ll
llvm/test/CodeGen/X86/vector-trunc-math.ll