perf/x86/intel: Drain the PEBS buffer during context switches
authorYan, Zheng <zheng.z.yan@intel.com>
Wed, 6 May 2015 19:33:51 +0000 (15:33 -0400)
committerIngo Molnar <mingo@kernel.org>
Sun, 7 Jun 2015 14:08:54 +0000 (16:08 +0200)
commit9c964efa4330a58520783effe9847f15126fef1f
treece0ab6b36e279c9038806fc4bd05d6cd3cf46af1
parent3569c0d7c5440d6fd06b10e1ef9614588a049bc7
perf/x86/intel: Drain the PEBS buffer during context switches

Flush the PEBS buffer during context switches if PEBS interrupt threshold
is larger than one. This allows perf to supply TID for sample outputs.

Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@infradead.org
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1430940834-8964-6-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event.h
arch/x86/kernel/cpu/perf_event_intel.c
arch/x86/kernel/cpu/perf_event_intel_ds.c
arch/x86/kernel/cpu/perf_event_intel_lbr.c