[AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup
authorKerry McLaughlin <kerry.mclaughlin@arm.com>
Wed, 26 Feb 2020 09:49:50 +0000 (09:49 +0000)
committerKerry McLaughlin <kerry.mclaughlin@arm.com>
Wed, 26 Feb 2020 11:22:23 +0000 (11:22 +0000)
commit9c859fc54d92ce6890c9b17addb411a4b577e165
tree563e9a5f08223e228dce87ab3ce512b426c2a7e7
parent1d06e75df2a332edae972876e0e2b08dca3ba925
[AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

Summary:
Implements the following intrinsics:
 - @llvm.aarch64.sve.bdep.x
 - @llvm.aarch64.sve.bext.x
 - @llvm.aarch64.sve.bgrp.x
 - @llvm.aarch64.sve.tbl2
 - @llvm.aarch64.sve.tbx

The SelectTableSVE2 function in this patch is used to select the TBL2
intrinsic & ensures that the vector registers allocated are consecutive.

Reviewers: sdesmalen, andwar, dancgr, cameron.mcinally, efriedma, rengolin

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74912
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve2-intrinsics-bit-permutation.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/sve2-intrinsics-perm-tb.ll [new file with mode: 0644]