Move tail call disabling code to target independent code
authorReid Kleckner <rnk@google.com>
Tue, 3 Dec 2019 00:42:33 +0000 (16:42 -0800)
committerReid Kleckner <rnk@google.com>
Fri, 3 Jan 2020 19:27:41 +0000 (11:27 -0800)
commit9c2b72821be64db7795dd18586c2ae7edb905c21
treef80ab96f0c8ee84a36f5a08399f5ed73c2d07e9f
parente5a56f2d50ce1939eba4fddbeb9c8e032db4fc95
Move tail call disabling code to target independent code

When the "disable-tail-calls" attribute was added, checks were added for
it in various backends. Now this code has proliferated, and it is
something the target is responsible for checking. Move that
responsibility back to the ISels (fast, global, and SD).

There's no major functionality change, except for targets that never
implemented this check.

This LLVM attribute was originally added in
d9699bc7bdf0362173fcd256690f61a4d47429c2 (2015).

Reviewers: echristo, MaskRay

Differential Revision: https://reviews.llvm.org/D72118
12 files changed:
llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/AArch64/tail-call.ll
llvm/test/CodeGen/RISCV/tail-calls.ll