crypto/fsl: make SEC%u status line consistent
authorMichael Walle <michael@walle.cc>
Sat, 27 Jun 2020 20:58:48 +0000 (22:58 +0200)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 27 Jul 2020 08:46:28 +0000 (14:16 +0530)
commit9b86bf2d1438bb7d3e500e19b641a30ebec70ed8
treec28f26e0244d7a8819914ac2a52f0ae5752a266f
parent317fff59091f8a2a4f177a8335df85a705c36139
crypto/fsl: make SEC%u status line consistent

Align the status line with all the other output in U-Boot.

Before the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT:   Started with servicing (60s timeout)

After the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0:  RNG instantiated
WDT:   Started with servicing (60s timeout)

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers/crypto/fsl/jr.c