riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro
authorFrederik Haxel <haxel@fzi.de>
Tue, 12 Dec 2023 13:01:13 +0000 (14:01 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 25 Jan 2024 23:35:50 +0000 (15:35 -0800)
commit9b2f64ba99bf4cdc3df39ebf75bbf0d95a0c19e5
tree3714243c0f28333a3e982dff2d1879fbd6cc341a
parente1e1058828eda06bba4dac4744860fea6dcdf504
riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro

[ Upstream commit 5daa3726410288075ba73c336bb2e80d6b06aa4d ]

During the refactoring, a bug was introduced in the rarly used
XIP_FIXUP_FLASH_OFFSET macro.

Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: e7681beba992 ("RISC-V: Split out the XIP fixups into their own file")

Signed-off-by: Frederik Haxel <haxel@fzi.de>
Link: https://lore.kernel.org/r/20231212130116.848530-3-haxel@fzi.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/riscv/include/asm/xip_fixup.h