ice: trigger PFINT_OICR_TSYN_TX interrupt instead of polling
authorJacob Keller <jacob.e.keller@intel.com>
Thu, 1 Jun 2023 21:15:06 +0000 (14:15 -0700)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Thu, 8 Jun 2023 20:03:31 +0000 (13:03 -0700)
commit9a8648cce8d8a4a7770b45239912e20edb9736ad
tree895dce5d14804a985cb7dc475b3d900c08ea7f19
parentae39eb42dd06e058215d0f782365b84039d686d4
ice: trigger PFINT_OICR_TSYN_TX interrupt instead of polling

In ice_misc_intr_thread_fn(), if we do not complete all Tx timestamp work,
the thread function will poll continuously forever.

For E822 hardware, this wastes time as the return value from
ice_ptp_process_ts() is accurate and always reports correctly that the PHY
actually has new timestamp data.

In addition, if we receive enough timestamps with the right pacing, we may
never exit this polling. Should this occur, other tasks handled by the
ice_misc_intr_thread_fn() will never be processed.

Fix this by instead writing to PFINT_OICR, causing an emulated interrupt to
be triggered immediately. This does take slightly more processing than just
re-checking the timestamps. However, it allows all of the other interrupt
causes a chance to be processed first in the hard IRQ function.

Note that the OICR interrupt is configured to be throttled  to no more than
once every 124 microseconds. This gives an effective interrupt rate of
~8000 interrupts per second. This should thus not cause a significant
increase in overall CPU usage when compared to sleeping.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Arpana Arland <arpanax.arland@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_main.c