[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch
authorJustin Holewinski <jholewinski@nvidia.com>
Thu, 17 Jul 2014 11:59:04 +0000 (11:59 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Thu, 17 Jul 2014 11:59:04 +0000 (11:59 +0000)
commit9a2350e45950e13d3d3a0ff318c10912ffef9d32
tree4cfdf0344397f15294f6c962b7b65cf0e441f2ae
parentd86ca7a9c7c27eb968645a12cf8bb1f708c4fed3
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

This also uses TSFlags to mark machine instructions that are surface/texture
accesses, as well as the vector width for surface operations.  This is used
to simplify some of the switch statements that need to detect surface/texture
instructions

llvm-svn: 213256
14 files changed:
llvm/include/llvm/IR/IntrinsicsNVVM.td
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXISelLowering.h
llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
llvm/lib/Target/NVPTX/NVPTXSubtarget.h
llvm/test/CodeGen/NVPTX/surf-read-cuda.ll [new file with mode: 0644]
llvm/test/CodeGen/NVPTX/surf-write-cuda.ll [new file with mode: 0644]
llvm/test/CodeGen/NVPTX/tex-read-cuda.ll [new file with mode: 0644]
llvm/test/CodeGen/NVPTX/tex-read.ll