drm/i915: fixup interlaced vertical timings confusion, part 2
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 28 Jan 2012 13:49:21 +0000 (14:49 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 Feb 2012 16:24:21 +0000 (17:24 +0100)
commit99fca60c76ffbdbf64aa00abf671014f711aea0e
treecfd7ae8bda9bcb7ccef59cb9b638417e32b05430
parentca9bfa7eed20ea34e862804e62aae10eb159edbb
drm/i915: fixup interlaced vertical timings confusion, part 2

According to bspec, we need to subtract an additional line from vtotal
for interlaced modes and vblank_end needs to equal vtotal. All other
timing fields do not need this special treatment, so kill it.

Bspec says that this is irrespective of whether the interlaced mode
has an odd or even vtotal, both modes are supported.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Christopher Egert <cme3000@gmail.com>
Tested-by: Alfonso Fiore <alfonso.fiore@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c