gdb/riscv: Update test to handle targets without an fpu
authorAndrew Burgess <andrew.burgess@embecosm.com>
Tue, 4 Dec 2018 11:48:42 +0000 (11:48 +0000)
committerAndrew Burgess <andrew.burgess@embecosm.com>
Tue, 11 Dec 2018 11:36:52 +0000 (11:36 +0000)
commit99e1a184a791d30c09a86d6eca4528dc146c2c79
treea93f9626946d8aec365af5b66891bc5dea60ae54
parent8970c0224e3c36c565672089e38de42765e87f47
gdb/riscv: Update test to handle targets without an fpu

The FPU is optional on RISC-V.  The gdb.base/float.exp test currently
assumes that an fpu is always available on RISC-V.  Update the test so
that this is not the case.

gdb/testsuite/ChangeLog:

* gdb.base/float.exp: Handle RISC-V targets without an FPU.
gdb/testsuite/ChangeLog
gdb/testsuite/gdb.base/float.exp