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(parent: c19c51e) | patch
[AMDGPU] Make BVH isel consistent with other MIMG opcodes
authorCarl Ritson <carl.ritson@amd.com>
Tue, 17 Aug 2021 01:24:49 +0000 (10:24 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Tue, 17 Aug 2021 01:42:22 +0000 (10:42 +0900)
commit99c790dc21b80cceae6084f6cec8c66e75c8d390
tree5787f92937e14582751caecda232c204769cba6atree | snapshot
parentc19c51e357a2e15e391e547441291f8a2ff771f9commit | diff
[AMDGPU] Make BVH isel consistent with other MIMG opcodes

Suffix opcodes with _gfx10.
Remove direct references to architecture specific opcodes.
Add a BVH flag and apply this to diassembly.
Fix a number of disassembly errors on gfx90a target caused by
previous incorrect BVH detection code.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D108117
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp diff | blob | history
llvm/lib/Target/AMDGPU/MIMGInstructions.td diff | blob | history
llvm/lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp diff | blob | history
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h diff | blob | history
llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt diff | blob | history
llvm/test/MC/Disassembler/AMDGPU/mimg_gfx90a.txt diff | blob | history
Domain: System / Toolchain;