[AMDGPU] gfx11 vop3dpp instructions
authorJoe Nash <Joseph.Nash@amd.com>
Wed, 18 May 2022 19:01:20 +0000 (15:01 -0400)
committerJoe Nash <Joseph.Nash@amd.com>
Mon, 6 Jun 2022 13:34:59 +0000 (09:34 -0400)
commit99a83b1286748501e0ccf199a582dc3ec5451ef5
treed8ef68a2199e90573df8c64ef9ec92e7dd537d93
parent4eab04f8491ab4fb8456eea9a73657701c554625
[AMDGPU] gfx11 vop3dpp instructions

gfx11 adds the ability to use dpp modifiers on vop3 instructions.
This patch adds machine code layer support for that. The MCCodeEmitter
is changed to use APInt instead of uint64_t to support these wider
instructions.

Patch 16/N for upstreaming of AMDGPU gfx11 architecture

Depends on D126475

Reviewed By: rampitec, #amdgpu

Differential Revision: https://reviews.llvm.org/D126483
20 files changed:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIInstrFormats.td
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/lib/Target/AMDGPU/VOP2Instructions.td
llvm/lib/Target/AMDGPU/VOP3Instructions.td
llvm/lib/Target/AMDGPU/VOPInstructions.td
llvm/test/MC/AMDGPU/gfx11_asm_dpp.s [new file with mode: 0644]
llvm/test/MC/AMDGPU/gfx11_err.s
llvm/test/MC/AMDGPU/gfx9-asm-err.s
llvm/test/MC/AMDGPU/vop_dpp.s
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt