[Arm64] AddAcross MaxAcross MinAcross MaxNumber MaxNumberPairwise MaxPairwise (#32620)

[Arm64] AddAcross MaxAcross MinAcross MaxNumber MaxNumberPairwise MaxPairwise (#32620)

Implements the following intrinsics:

* AddPairwise, AddPairwiseScalar

* MaxAcross

* MaxNumber, MaxNumberScalar

* MaxNumberAcross

* MaxPairwise, MaxPairwiseScalar

* MinAcross

* MinNumberAcross

* MinPairwise, MinPairwiseScalar

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Updates AddAcross to return Vector64<T> as we discussed in API review meeting

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Updates emitter such that emitIns functions for faddp (scalar), fmaxp (scalar), fmaxv, smaxv and similar instructions require opt argument to have non-INS_OPTS_NONE value (i.e. specified according to the Arm technical documentation even in a case when an instruction has only one valid vector arrangement). For example, 2-operand form of faddp requires INS_OPTS_2S or INS_OPTS_2D options to be specified and fmaxv requires INS_OPTS_4S.

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Changes the precedence of criteria for computing instruction SIMD size for GT_HWINTRINSIC node. This is needed for AddAcross, MaxAcross, AddPairwiseScalar etc.

For example, AddPairwiseScalar returns Vector64<T> value and before that change the SIMD size computed here was based only on the return value size (even when BaseTypeFromFirstArg or BaseTypeFromSecondArg flags were set), i.e. it was 8 bytes in all of these cases:

* Vector64<float> AddAcross(Vector128<float> value) - SIMD size should be 16 bytes FADDV Sd, Vn.4S

* Vector64<float> AddPairwiseScalar (Vector64<float> value) - SIMD size is 8 bytes FADDP Sd, Vn.2S

* Vector64<double> AddPairwiseScalar (Vector128<double> value) - SIMD size should be 16 bytes FADDP Dd, Vn.2D

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Moves smaxv, sminv, addv and similar instructions to a separate instruction form DV_2T.