GFX-Display:dynamic caculate DSI clock according mode
authorKe Ai <ke.ai@intel.com>
Tue, 13 Mar 2012 07:41:43 +0000 (15:41 +0800)
committerbuildbot <buildbot@intel.com>
Fri, 30 Mar 2012 03:47:19 +0000 (20:47 -0700)
commit998196895f0f3b72193b41798ff6d5710eb648b5
tree8ef82558fb79f7a727b9bc9b4dc47bb06952fafb
parentea79b1575309d117abed5a1f527a1fa9337a061c
GFX-Display:dynamic caculate DSI clock according mode

BZ: 28373

Before this patch, the DSI lock is hard code. Here update it according format caculate.

Please use the mode->vrefresh to change the DSI lock, as you wanted.

The DPLL will be changed during restore.In restore function, DPLL changed to by pass mode.
by functon mdfld_dsi_controller_init. in fact, this function is not necessary here. Another
place  will take care this.

mdfld_auo_dsi_dbi_restore(struct drm_encoder *encoder)
-------> mdfld_auo_dsi_controller_init(dsi_config, dsi_config->pipe, true);

Change-Id: I90c3f231d8f568a2d7a5d0f35d6608d40536a108
Signed-off-by: Ke Ai <ke.ai@intel.com>
Signed-off-by: Lei Zhang <lei.zhang@intel.com>
Signed-off-by: Geng Xiujun <xiujun.geng@intel.com>
Reviewed-on: http://android.intel.com:8080/39871
Reviewed-by: Xu, Randy <randy.xu@intel.com>
Tested-by: Xu, Randy <randy.xu@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
drivers/staging/mrst/drv/auo_sc1_cmd.c
drivers/staging/mrst/drv/gi_sony_cmd.c
drivers/staging/mrst/drv/psb_intel_display2.c
drivers/staging/mrst/drv/psb_powermgmt.c
drivers/staging/mrst/drv/tmd_6x10_vid.c