[RISCV][SelectionDAG] Support VP_ADD/VP_MUL/VP_SUB mask operations
authorLian Wang <Lian.Wang@streamcomputing.com>
Thu, 21 Apr 2022 03:17:31 +0000 (03:17 +0000)
committerLian Wang <Lian.Wang@streamcomputing.com>
Tue, 26 Apr 2022 02:30:22 +0000 (02:30 +0000)
commit998014830549b411b0f52f0fbf6c997a4faf3d8e
treef1093fef5cfb575e3a7fdb6769c5a874226fb166
parent059f39d2f44503862cb9c752c28a3a77275b0e51
[RISCV][SelectionDAG] Support VP_ADD/VP_MUL/VP_SUB mask operations

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D124144
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/RISCV/fixed-vectors-vadd-vp-mask.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/fixed-vectors-vmul-vp-mask.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/fixed-vectors-vsub-vp-mask.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/vadd-vp-mask.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/vmul-vp-mask.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/vsub-vp-mask.ll [new file with mode: 0644]