Reapply D70800: Fix AArch64 AAPCS frame record chain
authorOwen Anderson <resistor@mac.com>
Wed, 26 Aug 2020 19:36:13 +0000 (19:36 +0000)
committerOwen Anderson <resistor@mac.com>
Wed, 26 Aug 2020 19:38:38 +0000 (19:38 +0000)
commit9936455204fd6ab72715cc9d67385ddc93e072ed
treefe7acd35059cf4c4213daa10133b594ae22d3907
parent54a5dd485c4d04d142a58c9349ada0c897cbeae6
Reapply D70800: Fix AArch64 AAPCS frame record chain

Original Commit Message:
After the commit r368987 (rG643adb55769e) was landed, the frame record (FP and LR register)
may be placed in the middle of a stack frame if a function has both callee-saved
general-purpose registers and floating point registers. This will break the stack unwinders
that simply walk through the frame records (based on the guarantee from AAPCS64
"The Frame Pointer" section). This commit fixes the problem by adding the frame record offset.

Patch By: logan
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
llvm/test/CodeGen/AArch64/framelayout-fp-csr.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/framelayout-frame-record.mir [new file with mode: 0644]