[X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 26 Feb 2018 22:10:17 +0000 (22:10 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 26 Feb 2018 22:10:17 +0000 (22:10 +0000)
commit9929f907403381737207edcd03dc14e3020a6382
tree62fd4028fedd982bb13f7ff5067852ee7d6a86dc
parent781ef03e10120bf3b6a0770a1832a2e7fa37c079
[X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280)

Agner's tables indicate that for SSE42+ targets (Core2 and later) we can reduce the FADD/FSUB/FMUL costs down to 1, which should fix the Himeno benchmark.

Note: the AVX512 FDIV costs look rather dodgy, but this isn't part of this patch.

Differential Revision: https://reviews.llvm.org/D43733

llvm-svn: 326133
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/arith-fp.ll
llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll
llvm/test/Transforms/SLPVectorizer/X86/PR36280.ll
llvm/test/Transforms/SLPVectorizer/X86/cse.ll
llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
llvm/test/Transforms/SLPVectorizer/X86/simplebb.ll