net/mlx5: DR, Skip source port matching on FDB RX domain
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Sun, 4 Jul 2021 14:48:24 +0000 (17:48 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Thu, 26 Aug 2021 22:38:03 +0000 (15:38 -0700)
commit990467f8afde8c85215f6f4ab439b9615fd151e7
tree52f06a814a177d45b45ba2e9cff4e8969f8e79c0
parent63b85f49c05af3cc2dea6c4e0cfbac3786b3c638
net/mlx5: DR, Skip source port matching on FDB RX domain

The FDB RX pipe is connected to the wire and the source port for all
incoming packets equals to wire, single uplink port per PF, this means
there is no point of matching on the source port in such case.
Once we recognize such case, we will optimize the RX steering rule.
Note that in such case we clean both source_eswitch_owner_vhca_id and
source_port.

Signed-off-by: Alex Vesker <valex@mellanox.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c