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(parent: 2ea36e9) | patch
[AMDGPU] Serialize MFInfo::ScavengeFI
authorSebastian Neubauer <sebastian.neubauer@amd.com>
Fri, 30 Apr 2021 19:31:55 +0000 (21:31 +0200)
committerSebastian Neubauer <sebastian.neubauer@amd.com>
Fri, 7 May 2021 09:15:25 +0000 (11:15 +0200)
commit98e5ede60499f255c2cd48b85dcda14af5b99c7d
treeca5f3506ebf4c02a73c171a1754eb3c724fc1db3tree | snapshot
parent2ea36e94927ccbc1f8e915a4e5c932531e69f02dcommit | diff
[AMDGPU] Serialize MFInfo::ScavengeFI

Serialize ScavengeFI from SIMachineFunctionInfo into yaml.

ScavengeFI is not used outside of the PrologEpilogInserter,
so this shouldn't change anything.

Differential Revision: https://reviews.llvm.org/D101367
13 files changed:
llvm/include/llvm/CodeGen/MIRYamlMapping.h diff | blob | history
llvm/lib/CodeGen/CMakeLists.txt diff | blob | history
llvm/lib/CodeGen/MIRYamlMapping.cpp [new file with mode: 0644] blob
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h diff | blob | history
llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-fixed-stack.mir [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-stack.mir [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-no-stack.mir [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index.mir [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index2.mir [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll [new file with mode: 0644] blob
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir diff | blob | history
Domain: System / Toolchain;