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intel/disasm: Properly disassemble indirect SENDs
authorJason Ekstrand <jason@jlekstrand.net>
Fri, 24 Jan 2020 03:57:03 +0000 (21:57 -0600)
committerMarge Bot <eric+marge@anholt.net>
Fri, 24 Jan 2020 19:18:27 +0000 (19:18 +0000)
commit98aab272a820ed4b426d7cdfe82599ea8a635246
tree938eb133afd32f15c5031ea3ac8485f834e44876tree | snapshot
parent3b2eafbea959183c5ef27b11620edacaf8e92c8bcommit | diff
intel/disasm: Properly disassemble indirect SENDs

Instead of emitting g[a0]UD for the indirect descriptor, emit a0<0>UD.
This is more correct because there is no GRF involved.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3547>
src/intel/compiler/brw_disasm.c diff | blob | history
Domain: Graphics System / GL;