[AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
authorValery Pykhtin <valery.pykhtin@gmail.com>
Fri, 9 Jun 2023 11:40:37 +0000 (13:40 +0200)
committerValery Pykhtin <valery.pykhtin@gmail.com>
Thu, 6 Jul 2023 06:48:45 +0000 (08:48 +0200)
commit98aa8439f5e05cecdf232f303842be3c07d72547
tree786c747a3b491f181da61bccf6a4c82398a20ee9
parent893cc970076caf9bb05dd4cc0360b7cab013e6b9
[AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.

1. Improved code that deduces register class from instruction definitions. Previously if some instruction didn't contain a reg class for an operand it was considered as no information on register class even if other instructions specified the class.

2. Added check on required size of resulting register because in some cases classes with smaller registers had been selected (for example VReg_1).

Reviewed By: arsenm, #amdgpu

Differential Revision: https://reviews.llvm.org/D152832
llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-gen.mir
llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses.mir