arm64: Add CNTFRQ_EL0 trap handler
authorMarc Zyngier <marc.zyngier@arm.com>
Mon, 24 Apr 2017 08:04:03 +0000 (09:04 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Mon, 24 Apr 2017 11:22:25 +0000 (12:22 +0100)
commit9842119a238bfb92cbab63258dabb54f0e7b111b
treefae934d7eb5576d3ccd660651700ce122e397f5f
parent494bc3cd3dd02e259d5db9372754e993e4a21902
arm64: Add CNTFRQ_EL0 trap handler

We now trap accesses to CNTVCT_EL0 when the counter is broken
enough to require the kernel to mediate the access. But it
turns out that some existing userspace (such as OpenMPI) do
probe for the counter frequency, leading to an UNDEF exception
as CNTVCT_EL0 and CNTFRQ_EL0 share the same control bit.

The fix is to handle the exception the same way we do for CNTVCT_EL0.

Fixes: a86bd139f2ae ("arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled")
Reported-by: Hanjun Guo <guohanjun@huawei.com>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/esr.h
arch/arm64/kernel/traps.c