i2c: tegra: write clean data to TX FIFO
authorStephen Warren <swarren@nvidia.com>
Wed, 25 Jun 2014 16:57:28 +0000 (10:57 -0600)
committerHeiko Schocher <hs@denx.de>
Thu, 3 Jul 2014 04:29:31 +0000 (06:29 +0200)
commit981b14f01ae79f85eae3dc6873456abd08de2d86
treeee675d0e7b349bd964afd4d66a31bb77c66cf3dc
parent68049a082b8aedf09e769e61885e000e598bb516
i2c: tegra: write clean data to TX FIFO

The Tegra I2C controller's TX FIFO contains 32-bit words. If the final
FIFO entry of a transaction contains fewer than 4 bytes, the driver
currently fills the unused FIFO bytes with uninitialized data. This can
be confusing when reading back the FIFO content for debugging purposes.

Solve this by explicitly initializing the variable containing FIFO data
before filling it (partially) with data. With this change,
send_recv_packets()'s loop's if (is_write) code mirrors the else (i.e.
read) branch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Yen Lin <yelin@nvidia.com>
drivers/i2c/tegra_i2c.c