projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5a72445) | patch
[ARM] GlobalISel: Lower i8 and i16 register args
authorDiana Picus <diana.picus@linaro.org>
Mon, 19 Dec 2016 14:08:02 +0000 (14:08 +0000)
committerDiana Picus <diana.picus@linaro.org>
Mon, 19 Dec 2016 14:08:02 +0000 (14:08 +0000)
commit97ae95c3a855bf59f3f8760913176fdebc3a8ef9
tree7cb1db30cfed6a77d501a81f32632d682af51c3atree | snapshot
parent5a724452a0ed8c7cb1bc828dbf901b8ad8b28019commit | diff
[ARM] GlobalISel: Lower i8 and i16 register args

This allows lowering i8 and i16 arguments if they can fit in the registers. Note
that the lowering is incomplete - ABI extensions are handled in a subsequent
patch.

(Last part of)
Differential Revision: https://reviews.llvm.org/D27704

llvm-svn: 290106
llvm/lib/Target/ARM/ARMCallLowering.cpp diff | blob | history
llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll diff | blob | history
llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll diff | blob | history
Domain: System / Toolchain;