KVM: x86: Purge "highest ISR" cache when updating APICv state
authorSean Christopherson <seanjc@google.com>
Fri, 6 Jan 2023 01:12:35 +0000 (01:12 +0000)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 13 Jan 2023 15:45:22 +0000 (10:45 -0500)
commit97a71c444a147ae41c7d0ab5b3d855d7f762f3ed
tree7952672d192039435de29339615badb033f73d14
parent0a19807b464fb10aa79b9dd7f494bc317438fada
KVM: x86: Purge "highest ISR" cache when updating APICv state

Purge the "highest ISR" cache when updating APICv state on a vCPU.  The
cache must not be used when APICv is active as hardware may emulate EOIs
(and other operations) without exiting to KVM.

This fixes a bug where KVM will effectively block IRQs in perpetuity due
to the "highest ISR" never getting reset if APICv is activated on a vCPU
while an IRQ is in-service.  Hardware emulates the EOI and KVM never gets
a chance to update its cache.

Fixes: b26a695a1d78 ("kvm: lapic: Introduce APICv update helper function")
Cc: stable@vger.kernel.org
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20230106011306.85230-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/lapic.c