drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
authorImre Deak <imre.deak@intel.com>
Thu, 23 Mar 2023 14:20:31 +0000 (16:20 +0200)
committerImre Deak <imre.deak@intel.com>
Mon, 3 Apr 2023 08:35:31 +0000 (11:35 +0300)
commit9796a5b2725d1b3ddbbe7b1f3dec56af8cc6af22
treec4514c075df64af9240a5bce9c7dca6a8c22dff1
parentebcabb8b15708023b71b7044fdf928454613d118
drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec

Bspec has updated the TC connect/disconnect sequences, add the required
platform hooks for these.

The difference wrt. the old sequence is the order of taking the PHY
ownership - while holding a port power reference this requires - and
blocking the TC-cold power state.

Bspec: 49294

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-26-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_tc.c