dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs
authorSuman Anna <s-anna@ti.com>
Wed, 23 Jun 2021 17:06:30 +0000 (12:06 -0500)
committerRob Herring <robh@kernel.org>
Thu, 15 Jul 2021 13:35:48 +0000 (07:35 -0600)
commit977b3167c2bda24c3cd21e94ca7a4c25a386e812
tree0a71bd631a5d61137846ffdd8ec7d42202092233
parentfac4e24dcc56b59cfc5f0cbd559a89adc0fc63bf
dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs

The K3 AM64x SoCs also have a ICSSG IP that is similar to existing K3
AM65x and J721E SoCs. The ICSSG interrupt controller is identical to
that of the INTC on J721E SoCs, and supports 20 host interrupts and
160 input events from various SoC interrupt sources. All the 8 output
host interrupts are routed to multiple entities though. Update the
PRUSS interrupt controller binding with this information, though the
same K3 compatible shall be used for the ICSSG INTC on AM64x SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210623170630.1430-1-s-anna@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml