pinctrl: qcom: Add intr_target_width field to support increased number of interrupt...
authorNinad Naik <quic_ninanaik@quicinc.com>
Wed, 9 Aug 2023 10:06:34 +0000 (15:36 +0530)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 10 Aug 2023 08:48:15 +0000 (10:48 +0200)
commit9757300d2750ef76f139aa6f5f7eadd61a0de0d3
tree2d749b31308013606bcce7d5ac9314b3aae91cba
parentf00295e890bbc8780cd2076ee17bc7a08a53091c
pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets

SA8775 and newer target have added support for an increased number of
interrupt targets. To implement this change, the intr_target field, which
is used to configure the interrupt target in the interrupt configuration
register is increased from 3 bits to 4 bits.

In accordance to these updates, a new intr_target_width member is
introduced in msm_pingroup structure. This member stores the value of
width of intr_target field in the interrupt configuration register. This
value is used to dynamically calculate and generate mask for setting the
intr_target field. By default, this mask is set to 3 bit wide, to ensure
backward compatibility with the older targets.

Fixes: 4b6b18559927 ("pinctrl: qcom: add the tlmm driver sa8775p platforms")
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride
Signed-off-by: Ninad Naik <quic_ninanaik@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230809100634.3961-1-quic_ninanaik@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-msm.c
drivers/pinctrl/qcom/pinctrl-msm.h
drivers/pinctrl/qcom/pinctrl-sa8775p.c